1. Field of the Invention
The present invention relates to a signal transmission and reception device for an integrated circuit, and more particularly, to a signal transmission and reception device for a new wiring system in which a plurality of different signals generated between two functional blocks in an integrated circuit are transmitted on a signal transmission line.
2. Discussion of the Related Arts
Currently, as production techniques of integrated circuits are developed, a number of transistors included in one chip sharply increases. Particularly, as submicron devices are developed, the number of wiring, not only for local interconnections, but also for interconnections between functional blocks sharply increases, increasing a relative importance of the wiring in the entire chip region very high. To solve this problem, layers are stacked for easy of the wiring, which causes problems of difficulty in fabrication and a low yield coming from the multiple layer.
To reduce such wirings, employment of a multiple-valued logic may be considered, in which a signal is made to carry plural signals, disclosed in detail in [K. Wayne Current, "Current-Mode CMOS Multiple-Valued Logic Circuits", IEEE J. Solid-States Circuits, vol. 29, No. 2, pp. 95-107 February 1994]. In order to employ such a multiple-valued logic, all the functional blocks in the integrated circuit should be re-designed in conformity with the multiple-valued logic. That is, application of the multiple-valued logic to an existing digital circuit design is difficult and has a large power consumption. Therefore, it is necessary to develop a method in which wiring can be reduced while an internal circuit design of an integrated circuit is not changed for reducing an area of the integrated circuit, and a structure of less layers can be employed as the wiring is reduced form a simple fabrication process of the integrated circuit.